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Senior Network Design Verification Engineer, Google Cloud

Tel Aviv District, Israel (On-site)

Senior Network Design Verification Engineer, Google Cloud

1 Hour ago • 5 Years + • Research & Development

About the job

3 skills required for this role

Add these skills to join the top 1% applicants for this job

data-structures

innovation

networking

Job Description

As a Senior Network Design Verification Engineer at Google Cloud, you'll be part of a team developing custom silicon solutions. You'll build verification components, perform constrained-random testing and system testing, and ensure verification closure. Responsibilities include planning verification of digital design blocks, creating and enhancing verification environments using SystemVerilog or formal verification methods, identifying and writing coverage measures, debugging tests, and closing coverage to identify any gaps. You'll collaborate with design and verification engineers, ensuring functionally correct design blocks. The role requires expertise in digital design verification, networking protocols (TCP/IP, Ethernet, PCIe, RDMA), and experience with ASICs and FPGAs.

Must have:

Bachelor's degree in EE or equivalent
5+ years verifying digital designs (RTL, SystemVerilog/Specman)
Networking experience (RDMA, packet processing)
Experience with verification methodologies
System design principles for low latency/high throughput

Good to have:

Experience verifying with standard IP components
TCP/IP, Ethernet, PCIe, DRAM, NoC knowledge
Performance estimation, modeling, simulation
ASIC performance verification
ASIC standard interfaces and memory system architecture

Minimum qualifications:

Bachelor's degree in Electrical Engineering or equivalent practical experience.
5 years of experience verifying digital reasoning at Register-Transfer Level (RTL) using SystemVerilog or Specman/E for Field Programmable Gate Arrays (FPGAs) or ASIC.
Experience working with design networking like Remote Direct Memory Access (RDMA) or packet processing and system design principles for low latency, high throughput, security, and reliability.
Experience in creating and using verification components and environments in standard verification methodology.

Preferred qualifications:

Experience in verifying digital systems using standard Internet Protocol (IP) components or interconnects (e.g., microprocessor cores, hierarchical memory subsystems).
Experience in Transmission Control Protocol (TCP), IP, Ethernet, PCIE and Dynamic random-access memory (DRAM), Network on Chip (NoC) principles and protocols.
Experience in estimating performance by analysis, modeling, and network simulation in defining and driving performance test plans.
Experience with verification techniques, and the full verification life cycle.
Experience with performance verification of ASICs and ASIC components.
Experience with ASIC standard interfaces and memory system architecture.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You will contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

In this role, you will work as part of a Research and Development team. You will build verification components, constrained-random testing, system testing, and verification closure. You will verify digital designs and collaborate with design and verification engineers in projects and perform direct verification. You will build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

Plan the verification of digital design blocks by understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog or formally verify designs with Strategic Value Add (SVA) and industry leading formal tools.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Close coverage measures to identify verification holes and to show progress towards tape-out.

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.