Quality and Reliability Engineer, Google Cloud

1 Month ago • 8 Years + • Research & Development

Job Summary

Job Description

This Quality and Reliability Engineer role at Google Cloud focuses on building SoCs by driving quality and reliability processes from the Integrated Circuit perspective. Responsibilities include defining and leading qualification hardware and test developments, executing silicon and package qualification activities (HTOL, ELFR, ESD/LU, etc.), analyzing large data volumes to identify failure mechanisms, investigating IC quality and reliability issues, and developing physics-based statistical models to predict silicon device failures. Collaboration with cross-functional teams and global hardware teams is crucial.
Must have:
  • Bachelor's degree in related field
  • 8 years of IC silicon quality/reliability experience
  • Semiconductor CMOS technology expertise
  • Reliability modeling, data analytics, and statistics experience
  • Failure analysis and root cause identification
Good to have:
  • Semiconductor manufacturing process experience
  • Design-for-Reliability guidelines knowledge
  • Silicon qualification test methods familiarity
  • Advanced data analytics skills

Job Details


Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Materials Science, a related field, or equivalent practical experience.
  • 8 years of experience in IC silicon quality or reliability.
  • Experience in semiconductor CMOS technology, device physics, failure mechanisms, and accelerated test methodologies.
  • Experience in reliability modeling, data analytics, and statistics.

Preferred qualifications:

  • Experience in semiconductor reliability, manufacturing processes (fab, assembly, test), or IC and packaging failure mechanisms and related failure analysis.
  • Experience in data analytics, especially to identify commonalities and abnormalities.
  • Knowledge of Design-for-Reliability guidelines and implementation techniques.
  • Familiarity with test methods and hardware for silicon qualification (e.g., HTOL chambers, ESD, LU, etc.).

About the job

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

In this role, you will help build SoCs by driving quality and reliability processes from the Integrated Circuit perspective. You will work with various cross-functional teams to develop quality and reliability specifications, develop and deploy design guidelines, and develop and execute and test plans. Within the larger organization, you will collaborate with global hardware quality and reliability teams, silicon design, validation and engineering teams.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

Responsibilities

  • Define and lead qualification hardware and test developments in front of internal teams and external vendors.
  • Define and execute Silicon and package qualification activities (HTOL, ELFR, ESD/LU, b/HAST, THB, etc.).
  • Extract, manipulate, and analyze large volumes of data from Silicon and Package qualification programs (e.g. HTOL, ELFR, ESD, LU, UHAST, TCT, etc.), High Volume MFG, and field returns to identify failure mechanisms, reliability trends, and opportunities for yield and quality and reliability improvement.
  • Own cross-functional investigation of IC quality and reliability issues to identify root causes and develop solutions (RMA Triage, Analytics, Failure Analysis, etc.).
  • Develop and implement physics-based statistical Quality and Reliability models (ELF, TDDB, NBTI, HCI, Time zero failures, etc.) to predict silicon device failure mechanisms, degradation patterns, and lifetime behaviors.

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