ASIC Design Engineer Silicon

This ASIC Design Engineer role at Google involves developing custom silicon solutions for direct-to-consumer products. Responsibilities include defining microarchitecture details (interface protocols, block diagrams, data flow, pipelines), RTL development (SystemVerilog) and debugging simulations. The role also encompasses RTL quality checks (Lint, CDC, Synthesis, UPF), participation in synthesis, timing/power estimation, and FPGA/silicon bring-up. The ideal candidate possesses experience with digital design in ASIC, RTL design using Verilog/System Verilog and microarchitecture, ARM-based SoCs, interconnects, ASIC methodology, and scripting languages like Python or Perl. Experience with low power estimation, timing closure, synthesis, and RTL quality checks (Lint, CDC, RDC) is preferred.