Engineer II- ASIC Design

1 Minute ago • 5 Years +

Job Summary

Job Description

The Engineer II- ASIC Design role involves verifying IP, blocks, or subsystems at the SoC level. Responsibilities include generating verification documentation, analyzing and debugging blocks, developing and owning verification environments and components, and reporting to the Lead Engineer. The role requires expertise in digital verification, including constrained random verification, functional coverage, and System Verilog. The candidate will work on AMBA interface protocols and various communication protocols like UART, I2C, and SPI. The selected candidate will be responsible for ensuring the smooth operation of the systems, while also ensuring proper documentation for all the tasks performed. The candidate needs to be proactive, adaptable and keen to learn to succeed in this role.

Must have:

5+ years of experience with a Bachelors'/ master's degree
Understanding of verification flow and functional verification
Experience with digital verification aspects
Expert in System Verilog, Verilog, and OVM/UVM
Experience with AMBA interface protocols (AXI, AHB, APB)
Knowledge of Verilog/System Verilog, digital simulation, and debugging
Hands-on experience on working one or more of the following protocols – UART, I2C, SPI, QSPI, I3C, eMMC, CAN

Good to have:

Hands-on experience working with one or more of the following protocols – PCIe, USB, DDR, LPDDR, GBE, SATA
Experience with Perl, Python or similar scripting languages

Perks:

Great compensation package
Restricted Stock Units (RSUs)
Hybrid Working Model
Provisions to pursue advanced education from Premium Institute, eLearning content providers
Medical Insurance and a cohort of Wellness Benefits
Educational Assistance
Advance Loan Assistance
Office lunch & Snacks Facility

6 skills required

6 skills required for this role

Add these skills to join the top 1% applicants for this job

python

perl

innovation

networking

talent-acquisition

problem-solving

Job Details

The Opportunity

We're looking for the Wavemakers of tomorrow.

Alphawave Semi enables tomorrow’s future by accelerating the critical data communication at the heart of our digital world – from seamless video streaming to AI to the metaverse and much more. Our technology powers product innovation in the most data-demanding industries today, including data centers, networking, storage, artificial intelligence, 5G wireless infrastructure, and autonomous vehicles. Customers partner with us for mission-critical data communication, our innovative technologies, and our proven track record. Together, we enable the next generation of digital technology.

What You'll Do

Will be responsible for verification of IP, Block, or Subsystem at Soc Level
Generate appropriate documentation for verification
Responsible for analyzing/debugging given blocks/tasks in verification
Should be able to develop and own the verification environment, verification components developed
You will report to Lead Engineer

What You'll Need:

5+ years of experience with a Bachelors'/ master's degree in the field of Electrical, Electronics, or computer engineering
Should have a good understanding of verification flow, challenges, and requirements of functional verification
Have worked on IP level or Block level or SoC level functional verification
Experience with digital verification aspects such as constrained random verification, functional coverage, code coverage, assertions, methodology & philosophy
Expert in System Verilog, Verilog, and OVM/UVM verification methodology
Have working experience on AMBA interface protocols (AXI, AHB, APB)
Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must
Hands-on experience on working one or more of the following protocols is a must – UART, I2C, SPI, QSPI, I3C, eMMC, CAN,
Hands-on experience working with one or more of the following protocols is desired – PCIe, USB, DDR, LPDDR, GBE, SATA
Experience with Perl, Python or similar scripting languages will be helpful
Ability to adapt & learn, quickly and willingness to proactively take on responsibilities beyond the job description to accomplish team goals.

"Hybrid work environment"

As part of our commitment to the well-being and satisfaction of our employees, we have designed a comprehensive benefits package that includes:

Great compensation package
Restricted Stock Units (RSUs)
Hybrid Working Model
Provisions to pursue advanced education from Premium Institute, eLearning content providers
Medical Insurance and a cohort of Wellness Benefits
Educational Assistance
Advance Loan Assistance
Office lunch & Snacks Facility

Equal Employment Opportunity Statement

Alphawave Semi is an equal opportunity employer, welcoming all applicants regardless of age, gender, race, disability, or other protected characteristics. We value diversity and provide accommodations during the recruitment process.