RTL Design Engineer

Experience range : 4+ Yrs and above only(no freshers please)

Work Location : Hyderabad

Notice : Immediate to 15 days

Job Scope:

• RTL development from micro-architecture
• SoC, Memory, Peripheral, Security and Cache IP’s Analysis & Integration
• RTL Quality checks (VCS, synthesis checks, LINT, LEC, CDC)
• Failures Debug/Bug fixes on RTL and Netlist
• Low level design document generation, implementation & review
• ARM Cortex based system understanding & Integration.
• DFT needs: ATPG pattern generation, low pin count implementation, coverage analysis and improvement.
• DFT needs: MBIST wrapper generation and verification, memory repair.
• DFT needs : debug interface (JTAG, Serial wire debug for ARM)
• DFT needs: Scan constraints development and support for implementation.

Please share resumes to suman.ragothama@bitsilica.com