This role involves developing custom silicon solutions for Google's consumer products. Responsibilities include modeling, analyzing, and projecting power and performance of compute-centric hardware IP blocks (GPUs, TPUs, ISPs) on mobile SoCs. The engineer will study workload behavior, identify bottlenecks, and propose hardware and software co-optimization improvements. This requires experience in computer or chip architecture, performance analysis, and software development for Compute IPs. The ideal candidate possesses expertise in performance and power optimization, and knowledge of GPU, TPU, or ISP hardware architecture. The position is based in New Taipei City, Taiwan.