ASIC Power Architect, Silicon
Job Summary
Job Description
This role involves designing, implementing, testing, and deploying software services for Google's SoC architecture exploration, focusing on power and performance. Responsibilities include writing high-quality Python, SQL code, analyzing and resolving bugs, improving service stability, working with large datasets to identify trends, developing dashboards and visualizations, and creating technical documentation. The ideal candidate will have experience in ASIC power management, low-power design, and software development, with a strong understanding of power-performance trade-offs. They will contribute to the innovation behind Google's direct-to-consumer products, shaping the next generation of hardware experiences. This position requires a deep understanding of low power architectures and power optimization techniques, including multi-Vth/power/voltage domain design, clock gating, power gating, and DVFS/AVS.
Must have:
- ASIC power management experience
- Low power design/methodology expertise
- Python software development skills
- Data structures/algorithms knowledge
- ASIC low power flows understanding
Good to have:
- Master's/PhD in relevant field
- Experience with software testing and CI/CD
- CPU/SoC interconnect fabric experience
- Knowledge of power optimization techniques (DVFS, AVS)
- Understanding of software/architectural design impact on power/thermal behavior
7 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience in ASIC power management or low power design/methodology.
- 2 years of experience with software development in Python, and with data structures/algorithms.
- Experience with ASIC low power flows and power management concepts.
Preferred qualifications:
- Master's degree or PhD in Electronics or Computer Engineering/Science, with an emphasis on computer architecture, performance and power analysis.
- 5 years of experience with software development in Python, and with data structures/algorithms.
- Experience with software testing, maintaining, CI/CD flow.
- Experience in CPU, SoC interconnect fabric.
- Experience with low power architectures and power optimization techniques (multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling (DVFS, AVS).
- Knowledge of software and architectural design decisions on power and thermal behavior of the system.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Perform designing, implementation, testing, and deployment of software services that helps Google SoC architecture exploration in terms of power and performance, including writing high-quality code in languages like Python, SQL, and adhering to team coding standards.
- Analyze and resolve bugs reported by internal teams or automated monitoring systems. Develop and implement solutions to improve the stability and reliability of our services.
- Work with large datasets to identify trends and anomalies in SoC power and performance reports. Contribute to the development of dashboards and visualizations to aid in monitoring and troubleshooting.
- Write high-quality technical documentation, including design documents, code comments, and user guides.
- Provide power-performance trade-off analyses for engineering reviews and product roadmap decisions.
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