ASIC Design Engineer

The ideal candidate will have experience in ASIC design with experience in architecture research and/or development of memory or highly interconnected system architectures. They should have RTL/micro-architecture knowledge. Experience with high-performance memory subsystems, including DRAM controller, PHY architecture and design, DFI interface, and DRAM interface calibration/training mechanisms and algorithms is a plus. Furthermore, the candidate should have systems experience in characterizing performance, doing comparison studies, and documenting and publishing results.