Functional DV Verification Sr Engineer

1 Month ago • 5-8 Years

Job Summary

Job Description

As a Graphics Verification Engineer, you will be responsible for verifying the Clock and power management module with design features for low power. Your responsibilities will include understanding GPU power and clock domains, owning end-to-end DV tasks like coding test benches, writing assertions, debugging simulations, and achieving coverage goals. You will also develop test plans to verify sequences and design components for Clock and power management modules. The role requires collaboration with worldwide design, silicon, and architecture teams. The candidate should possess strong communication skills to work with global teams. The candidate should have experience in Clock and power management module.
Must have:
  • 5-8 years of design verification experience
  • Strong System Verilog/UVM based verification skills
  • Experience with assertion & coverage-based verification methodology
Good to have:
  • Experience in formal / static verification methodologies
  • Understanding of low power design techniques
  • Experience with Synopsys NLP tool
  • Experience with scripting languages such as Perl, Python

Job Details

Qualcomm Graphics HW team in Bangalore is responsible for developing and delivering GPU solutions which are setting the power and performance benchmark in mobile computing industry. In this role of Graphics Verification Engineer, you will be verifying the Clock and power management module with design features for low power.

The responsibilities will majorly include:

  • Understanding of GPU power and clock domains with power-up/down sequences
  • Own end to end DV tasks from coding Test bench and test cases, write assertions, debugging  simulations and achieving all coverage goals
  • Develop test plan to verify sequences and design components for Clock and power management modules.
  • Explore innovative  DV methodologies (formal and  simulation ) to continuously push the quality and efficiency of test benches

Successful candidate will be  required to collaborate with worldwide design, silicon and architecture teams to achieve all project goals. Hence, we are looking for candidates with strong communication skills.

Minimum Qualifications

Minimum 5 -8 years of design verification experience
* Senior positions to be offered to candidates with proven expertise in the relevant field

Preferred Qualifications *

3+ years industry experience with below skillset :

  • Strong System Verilog/UVM based verification skills & experience with assertion & coverage-based verification methodology
  • Experience in formal / static verification methodologies will be a plus
  • Basic understanding of low power design techniques
  • Good understanding of  design components such as clock gates, level shifters, isolation cells and state retention cells.
  • Experience with Synopsys NLP (native Low Power) tool.
  • Experience with scripting languages such as Perl, Python is a plus

Education Requirements

BE/BTech/ME/MTech/MS Electrical Engineering and/or Electronics, VLSI  from reputed university preferably with distinction

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About The Company

Our employees make Qualcomm’s success possible. We hire the brightest minds and foster a supportive, inclusive culture where your ideas have the power to contribute to world-changing innovations and breakthrough technologies. To make that possible, we leverage the breadth and depth of our diverse expertise from around the world to answer the unasked, conquer the complex, and solve some of the biggest challenges only we can – together.

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