Memory Design Engineer

21 Hours ago • 6-8 Years

Job Summary

Job Description

The Memory Design Engineer will be responsible for designing and developing digital circuits for custom blocks including SRAM, register files, memory compilers, and caches. This includes designing floorplans, performing circuit design, schematic entry, simulation, and verification to optimize performance, power, area, timing, and yield. The role also involves creating DFT models, developing memory test tools, and improving design flows. Collaboration with cross-functional teams to report progress and resolve design issues is crucial. Optimization of performance, power, and area, along with driving characterization of memory instances and compilers, is also expected.
Must have:
  • Bachelors/Masters in Electrical Engineering or related field.
  • 6+ years of experience in memory design.
  • Experience with scripting languages like Perl/Tcl.
  • Experience with memory design convergence tools.
Good to have:
  • Experience in scripting, compiler understanding, and hands on experience in coding tilers.

Job Details

Job Details:

Job Description: 

  • Designs, develops, and builds digital circuits for custom blocks including SRAM, register files, memory compilers, and caches.
  • Designs floorplans, performs circuit design, schematic entry, simulation for major blocks, and verifies functionality to optimize custom circuit for power, performance, area, timing, and yield goals.
  • Creates block level DFT models, develops memory test tools, and improves and automates flows and methodologies to ensure streamlining of design.
  • Collaborates cross functionally to report design progress and to collect, track, and resolve any performance and memory circuit design issues.
  • Optimizes performance, power, and area, reduce leakage of circuits, and drive characterization of individual memory instances and memory compilers.
  • Works with architecture and layout teams to design circuit for best functionality, robustness, and electrical capabilities.

Qualifications:

The candidate must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum qualifications

  • Must have a Bachelors (B.Tech) in Electronics or Masters (M.Tech) in Electrical, Microelectronics or VLSI Engineering.
  •  B.Tech with 8+ years and M. Tech with 6+ years’ experience required.
  •  6+ years' experience with scripting (Perl, tcl etc.
  • 6+ years' experience in memory design convergence tools including formal equivalence verification, static timing methodology, electrical reliability and robustness analysis.
  • 6+ years' experience with transistor level operation, memory bitcell design, design challenges under process variations and low power circuit techniques, Innovative architectural proposals, driving layouts and its driven decisions.

    Preferred Qualifications
  • Some experience in scripting, compiler understanding and hands on experience in coding tilers.

          

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location: 

India, Bangalore

Additional Locations:

Business group:

As the world's largest chip manufacturer, Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support.  Employees in the Technology Development and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore’s Law to bring smart, connected devices to every person on Earth.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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