SoC RTL Design Engineer

3 Months ago • 3 Years + • Research & Development

Job Summary

Job Description

This role involves designing custom silicon solutions for Google's direct-to-consumer products. Responsibilities include defining microarchitecture of subsystems or SoCs, performing RTL coding (Verilog/SystemVerilog), simulation debugging, and collaborating with cross-functional teams (Architecture, Verification, DFT, Physical Design, and Software). The engineer will create block-level design documents, perform STA closure, review DV test plans, and analyze coverage. The ideal candidate has a Bachelor's degree (Master's preferred) in Electrical Engineering or Computer Science and at least 3 years of relevant experience. The work contributes to innovative hardware experiences with unparalleled performance, efficiency, and integration.
Must have:
  • 3+ years RTL coding (Verilog/SystemVerilog)
  • STA closure, DV test plan review, coverage analysis
  • Microarchitecture definition, SoC integration
  • Collaboration with cross-functional teams
Good to have:
  • Master's degree
  • Knowledge of Process Cores, Interconnects, Debug & Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, or Pin-muxing

Job Details

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Science, or equivalent practical experience.
  • 3 years of experience in RTL coding using Verilog or Systemverilog language.
  • Experience in STA closure, DV test-plan review, and coverage analysis of the sub-system and chip level verification.

Preferred qualifications:

  • Master's degree in Electrical Engineering, Computer Science, or a related field.
  • Knowledge in Process Cores, Interconnects, Debug and Trace, Security, Interrupts, Clocks/Reset, Power/Voltage Domains, or Pin-muxing.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

  • Define the microarchitecture of Subsystems or SoCs and work with the team to deliver a quality, schedule compliant design.
  • Perform RTL coding for Subsystems/SoC integration, function/performance simulation debug, Lint/CDC/FV/UPF checks.
  • Work closely with the cross-functional team of Architecture, Verification, Design for Test, Physical Design, and Software teams to make design decisions.
  • Define the block level design document such as interface protocol, block diagram, transaction flow, pipeline, etc.

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About The Company

A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.

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