Hiring Software, Firmware, RTL, Verification, FPGA and Physical Design Engineers

About Tsavorite Scalable Intelligence Inc.,

Tsavorite Scalable Intelligence is a semiconductor company focused on accelerating the adoption of end-to-end enterprise AI, from the edge to Zettascale systems.

"Join Our Growing Team!"

We're building a world-class team to drive innovation in AI Silicon & Software Development, and

hiring for the below positions in the US and Bangalore (India) sites.

Let's share the future of AI together - take the first step towards an exciting career with us.

Send your resume and a brief introduction about yourself to "jobs@tsavoritesi.com".

Note: Minimum 3yrs+ work experience is required to be considered for below positions.

ML SW Engineer Positions

• ML Backend Compiler Engineers with MLIR, LLVM experience
• ML Runtime Engineers with Level Zero and Scheduler experience
• PyTorch & ONNX ML Framework Engineer
• ML engineers with expertise in LLMs, CNN, RNN Inference, and Training
• Performance Engineer with an in-depth understanding of ML Model Architectures and Computational requirements. Experience with performance analysis tools and methodologies.

System SW and FW Engineers

• Systems SW Engineer with experience in developing health monitoring, Linux drivers, and memory checker debug frameworks.
• Experience in distributed computing and building multi-tenant virtualized systems.
• Systems SW Engineer with Experience in cluster management software and device discovery protocols like PAXOS, NCCL, RCCL, or any other distributed device discovery
• Firmware Engineer with experience in writing device drivers for RDMA, RCoE, Ethernet, CXL, and other proprietary interfaces.

RTL Design Engineers

• Hands-on experience with micro-architecture and RTL development of x86/ARM CPU Processors or high-speed custom ASICs/Accelerators.
• RTL design expertise with any one of - Cache controllers, IO interfaces (PCIe, CXL, Ethernet), UCIe, Memory Controllers, Display, and Video Encoding/Transcoding IP designs.

Design Verification Engineers

• Deep expertise and hands-on experience in developing UVM, SV testbench components, Checkers, Scoreboard and Stimulus
• Experience in defining test plans and developing directed/constrained random tests to achieve Verification Coverage,
• Prior experience and knowledge of APB/AXI/CHI bus protocols, Serial peripherals (eg: I2C, SPI), I/O Interfaces (PCIe,/CXL/ Ethernet), Memory (DDR/LPDDR/HBM)
• Architectural Domain knowledge - Processors, Memory, Coherency,

FPGA Engineer

• Experience in handling RTL-to-Bitstream design cycle on million+ gate FPGAs
• Expertise in design partitioning, Verilog coding for FPGA fit.
• Expertise in timing analysis, design optimization for timing convergence and resource utilization
• Familiarity with Intel/Altera Quartus or AMD Vivado design flows
• Expertise in handling standard debugging tools such as ChipScope or custom debug tools

Desirable experience: Expertise in configuring and bringing up hardIP/embedded ARM Cores.

• Configuring and bringup of softcore processor Microblaze (Xilinx) or Nios (Altera)

Physical Design Verification Engineers

• Hands-on experience with defining methodology and setting up Physical Verification flows for both Block and SoC-level designs
• Expertise in industry standard tools used for physical verification such as Mentor Calibre, CalibreDRV, V2LVS, etc.
• Exposure to implementation tools like Innovus/ICC2 is a plus.

Physical Design Engineers

• Experience in Physical Design implementation (from RTL to GDS) at Block or SoC designs on advanced process nodes
• Expertise and experience with industry-standard CAD tools from Synopsys, Cadence or Siemens.
• Experience in collaborating with RTL design and Flows teams to drive feasibility studies and converge Block/SoC designs to meet target power, frequency, and area targets.

Power Delivery Network and Reliability Engineer

• Expertise in Power Grid design and in-depth knowledge of IR drop & EM(electromigration) concepts
• Knowledge of PDN tool algorithms and hands-on experience with industry-standard tools like Voltus and Redhawk/Redhawk-SC, Exposure to implementation tools like Innovus/ICC2 is a plus