As an ASIC Power Architect at Google, you'll be part of a team developing custom silicon solutions for Google's direct-to-consumer products. Responsibilities include driving the enablement of power management architecture for an ASIC (including image compute, CPU/GPU) to maximize performance under power and thermal constraints. You'll prototype and validate next-generation SoC power management systems at various design levels, track and correlate power-mode specifications across design phases, and perform analysis and optimization. You'll also produce detailed documentation, conduct trade-off analyses, and collaborate with software and power architecture teams on system-level designs. The role requires expertise in power management, post-silicon measurements, and a strong understanding of DVFS, idle power management, and system mitigation techniques.