ASIC RTL Integration Engineer

This ASIC RTL Integration Engineer role in Bengaluru, India involves leading a team in sub-system and chip-level integration activities, including task planning, code and design reviews, and complex feature development. You will collaborate closely with architecture, verification, DFT, physical design, and software teams. Responsibilities include developing implementation strategies to meet quality, schedule, and PPA goals, making design decisions, and representing project status. The ideal candidate has 8+ years of experience in high-performance design, multi-power domains, and multiple SoCs with silicon success. Proficiency in Verilog or System Verilog is essential. Experience with ASIC design methodologies (Lint, CDC/RDC, Synthesis, DFT, UPF, Low Power Optimization) is preferred.