CAD Developer, Timing and Physical Design Optimization

3 Months ago • 3 Years + • Research & Development

Job Summary

Job Description

NVIDIA's ASIC-PD methodology team seeks a senior CAD tool development engineer specializing in final timing closure. The role requires strong STA/timing fixing expertise and proficiency in C++ and Python. Responsibilities include inventing and optimizing methods to enhance chip frequency while minimizing power consumption across internal optimization tools. This involves improving C++ algorithms for gate-level sizing, buffering, useful clock skew, and cell legalization. The successful candidate will own the entire process, from identifying optimization opportunities to solution development and deployment within design teams. The role involves substantial coding alongside collaboration with design teams.
Must have:
  • 3+ years relevant experience
  • Strong STA/timing fixing skills
  • C++ and Python proficiency
  • VLSI timing optimization understanding
  • Experience with design implementation tools (PrimeTime, Tempus, ICC2, Innovus)
  • Excellent communication skills
Good to have:
  • C++14 experience (lambdas, concurrency)
  • High-performance software design experience (multithreading, distributed computing)
  • Perl and Tcl familiarity
Perks:
  • Competitive salary
  • Generous benefits package

Job Details

ASIC-PD methodology team is hiring senior tool development engineer, who will focus on final timing closure part of an internal tool at the beginning. The role needs both senior STA/timing fixing experience and good software skill (C++, python). The tool is our team's core internal tool which can cover both netlist and physical design related tasks.

What You’ll Be Doing:

  • Invent and optimize new methods for increasing chip frequency while minimizing power consumption across a suite of internal optimization tools. 

  • Improve algorithms (in C++) for gate-level sizing, buffering, useful clock skew, cell legalization

  • As with any software engineering team, we do write a lot of code, but this is broader than a typical CAD or EDA role. Instead, we as a team own the whole process from discovery and invention of new optimization opportunities, to developing solutions and working directly inside design teams to facilitate deployment.

What We Need To See:

  • BS, MS, PhD in Electrical Engineering or Computer Science or equivalent experience

  • Minimum 3+ years of relevant experience in CAD software and VLSI hardware design

  • Strength in both CAD software and VLSI design

  • Understanding of VLSI timing optimization and related concepts, including timing constraints, corners, power, etc.

  • Demonstrated ability in software development using C++

  • Familiarity with design implementation tools such as PrimeTime, Tempus, ICC2, Innovus, and typical design flows written in Perl, Tcl, and Python.

  • Strong communication and interpersonal skills

Ways To Stand Out From The Crowd:

  • C++14 or newer experience, such as lambdas and concurrency

  • Experience in high performance software design including multithreading, distributed computing, efficient memory and I/O use, etc.

With competitive salaries and a generous benefits package, NVIDIA is widely considered to be one of the most desirable employers in the world. We have some of the most brilliant and talented people in the world working for us. If you are creative, autonomous and love a challenge, we want to hear from you. We are an equal opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status.

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About The Company

Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.

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