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CPU Design Verification Engineer, Google Cloud

Tel Aviv District, Israel (On-site)

CPU Design Verification Engineer, Google Cloud

1 Hour ago • 3 Years + • Research & Development

About the job

6 skills required for this role

Add these skills to join the top 1% applicants for this job

shell

bash

python

perl

assembly-language

innovation

Job Description

Google Cloud seeks a CPU Design Verification Engineer to join their team. Responsibilities involve planning verification of digital design blocks, understanding specifications, collaborating with design engineers, creating and enhancing constrained-random verification environments using SystemVerilog/UVM or Specman, identifying and writing coverage measures, debugging tests, leading coverage measures to identify verification holes, and ensuring progress towards tape-out. The ideal candidate will have experience verifying digital logic at the RTL level, using standard IP components/interconnects, and creating verification components and environments. This role requires proficiency in SystemVerilog and UVM, along with a strong understanding of CPU architecture and verification methodologies.

Must have:

Bachelor's degree in EE or equivalent
3+ years verifying digital logic (RTL)
SystemVerilog, UVM, or Specman experience
Experience with standard IP components
Verification environment creation

Good to have:

Master's degree in EE or CS
Experience with CPU implementation
Assembly language or SoC experience
Python, Perl, Shell scripting

Minimum qualifications:

Bachelor's degree in Electrical Engineering or equivalent practical experience.
3 years of experience verifying digital logic at RTL level using SystemVerilog, or Specman/E for FPGAs or ASICs.
Experience verifying digital systems using standard IP components/interconnects (microprocessor cores, hierarchical memory subsystems).
Experience creating and using verification components and environments in standard verification methodology.

Preferred qualifications:

Master’s degree in Electrical Engineering, Computer Science, or equivalent practical experience.
Experience with UVM, SystemVerilog, or other scripting languages (e.g. Python, Perl, Shell, Bash, etc.).
Experience with CPU implementation, assembly language, or compute System on a Chip (SOC).

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a CPU Design Verification Engineer, you will work as part of a Research and Development team, and you will build verification components, constrained-random testing, system testing, and verification closure. As part of our server chip design team, you will verify digital designs. You will collaborate closely with design and verification engineers in projects and perform direct verification. You'll build efficient and effective constrained-random verification environments that exercise designs through their corner-cases and expose all types of bugs. You will manage the full lifecycle of verification which can range from verification planning, test execution or collecting, and closing coverage.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

Responsibilities

Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
Create and enhance constrained-random verification environments using SystemVerilog/UVM, or Specman.
Identify and write all types of coverage measures for stimulus and corner-cases.
Debug tests with design engineers to deliver functionally correct design blocks.
Lead coverage measures to identify verification holes and to show progress towards tape-out.

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.