Silicon Validation Engineer, TPU

2 Months ago • Upto 2 Years • Research & Development • $108,000 PA - $158,000 PA

Job Summary

Job Description

This Silicon Validation Engineer role focuses on Google's Tensor Processing Units (TPUs). Responsibilities include developing detailed silicon test plans, implementing software tests and flows for system validation and verification, collecting data to characterize HBM operation, and debugging issues during new product development. The ideal candidate will have experience in scripting (Python), computer architecture, and ideally C++ or SystemVerilog. The role involves working with a cross-functional team to ensure the reliability and performance of Google's AI/ML hardware.
Must have:
  • Bachelor's degree in related field
  • Python scripting experience
  • Computer architecture or semiconductor experience
  • Develop silicon test plans
  • Implement software tests and flows
  • Debug issues and find solutions
Good to have:
  • Master's degree in related field
  • 2 years of C++ or Python software design experience
  • SystemVerilog experience
  • Test automation tool experience
  • Understanding of unusual computer architectures
Perks:
  • Bonus
  • Equity
  • Benefits

Job Details

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience scripting in Python or equivalent programming language.
  • Computer architecture or semiconductor experience.

Preferred qualifications:

  • Master's degree in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • 2 years of experience with C++ or Python software design principles.
  • Experience with reading hardware description languages (SystemVerilog) and chip design flow. Experience building test automation tools and scripts.
    Enthusiasm for unusual computer architectures.

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

Behind everything our users see online is the architecture built by the Technical Infrastructure team to keep it running. From developing and maintaining our data centers to building the next generation of Google platforms, we make Google's product portfolio possible. We're proud to be our engineers' engineers and love voiding warranties by taking things apart so we can rebuild them. We keep our networks up and running, ensuring our users have the best and fastest experience possible.

The US base salary range for this full-time position is $108,000-$158,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .

Responsibilities

  • Develop detailed silicon test plans, based on design specifications and coordination with a cross functional silicon team (architecture, design, software, firmware) for Google's Tensor Processing Units.
  • Implement test plans by developing software tests and flows for system validation and verification, then utilize it all to collect data and characterize the operation of HBMs in test chips and production silicon. 
  • Triage and debug issues found during new product development and find solutions

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