SoC Interface Architect, Silicon

1 Week ago • 3 Years + • Research & Development

Job Summary

Job Description

This SoC Interface Architect role at Google involves developing custom silicon solutions for direct-to-consumer products. You'll define requirements, author architecture specifications and programming guides, analyze performance trade-offs, select IPs, and define the SoC IO map. Responsibilities include leading and supporting the lifecycle of low-speed interface development, collaborating with system teams, and contributing to innovative hardware experiences. The role requires expertise in low-speed interfaces (I2C, SPI, UART etc.) and familiarity with various protocols (I2S, JTAG, etc.).
Must have:
  • Bachelor's degree in Electrical Engineering or equivalent
  • 3+ years experience in interface architecture/design
  • Experience with I2C, SPI, UART protocols
  • Define architecture specifications and programming guides
  • Lead low-speed interface development lifecycle
Good to have:
  • Master's degree in Electrical Engineering
  • SoC or systems architecture experience
  • IO timing closure and GPIO circuit design experience
  • Experience with I2S, JTAG, TDM, PDM, SoundWire, SPMI, MIPI protocols

Job Details

Minimum qualifications:

  • Bachelor's degree in Electrical Engineering or equivalent practical experience.
  • 3 years of experience in architecture, microarchitecture, design, or physical design of low speed interfaces or GPIO
  • Experience in protocols such as Improved Inter-Integrated Circuit, I2C, Universal Asynchronous Receiver-Transmitter, SPI.

Preferred qualifications:

  • Master's degree in Electrical Engineering or related field.
  • Experience in SoC architecture or systems architecture.
  • Experience in IO timing closure and with GPIO circuit design.
  • Experience with the following protocols: I2S, JTAG, TDM, PDM, SoundWire, SPMI.
  • Experience in MIPI protocols like I3C, I2C, UART, and SPI.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

Responsibilities

  • Define the requirements and author architecture specifications and the programming guides.
  • Analyze performance, power, area, and cost trade-offs.
  • Perform 3PIP selection of low speed interface IPs and General Purpose input/output (GPIO) IPs.
  • Define and maintain SoC input/output (IO) map collaborating with the system team.
  • Lead and drive and support throughout the life cycle of low speed interfaces development.

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