SoC Physical Design Engineer, STA/Timing

We are seeking a SoC Physical Design Engineer specializing in Static Timing Analysis (STA) and timing. The role involves collaborating with design teams to understand and resolve constraints, debug timing issues, and facilitate logic changes to improve performance. You will work closely with the Physical Design team, advising on best practices and highlighting potential problems. A key responsibility includes creating timing ECOs (Engineering Change Orders) for project tapeouts. The engineer will develop and maintain scripts and methodologies for timing analysis and runs, as well as create documentation and guidelines. This position requires deep analysis of timing paths to identify critical issues and implement timing infrastructure.