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SOC Power Estimation Engineer

Karnataka, India (On-site)

SOC Power Estimation Engineer

6 Days ago • 2 Years + • Research & Development

About the job

4 skills required for this role

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python

perl

communication

innovation

Job Description

This SOC Power Estimation Engineer role at Google involves pre-silicon power estimation and analysis using RTL and Netlist level tools. Responsibilities include developing power estimation methodologies, conducting what-if analysis for IPs and subsystems, identifying power-saving opportunities, and collaborating with the architecture design team. The ideal candidate will have experience with low power RTL and physical design techniques, scripting languages (Python, Perl), and RTL power estimation tools. The role contributes to the development of custom silicon solutions for Google's products, focusing on performance, efficiency, and integration.

Must have:

Bachelor's degree in related field
2+ years experience with low power RTL and physical design
Experience with scripting languages (Python, Perl)
Pre-silicon power estimation and analysis
Power estimation tool expertise

Good to have:

SoC architecture experience
Power management & clocking architecture knowledge
RTL level power estimation/analysis tools experience

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience
2 years of experience with low power RTL and physical design techniques.
Experience with scripting languages (e.g., Python, Perl).

Preferred qualifications:

Experience in System on a Chip (SoC) architecture, power management architecture, clocking architecture.
Experience with RTL level power estimation/analysis tools.
Ability to work separately and as part of a team.
Excellent problem-solving and investigative skills.
Excellent communication and teamwork skills.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

Drive pre-silicon power estimation and analysis using power estimation tools both at Register-Transfer Level (RTL) and Netlist level.
Develop methodologies around power estimation tools and incorporate best practices to improve the power estimation.
Drive Power estimation and what-if analysis for IP(s) and SubSystem(s) and drive closure of projections vs targets gaps.
Analyze power estimation reports to identify power-saving opportunities and influence both the physical design aspect and the u-arch design aspects of the design for power reduction.
Collaborate with the Arch Design team to define the right definition of scenarios and operating conditions to estimate the use-case power for the IP which reflects the real world usage of the IP.

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.