MultiMedia Design Verification Engineer, Silicon

This role involves collaborating with design engineers to understand design specifications and identify critical verification scenarios for complex multimedia digital design blocks. Responsibilities include developing and refining constrained-random verification environments using SystemVerilog and UVM, defining and implementing comprehensive coverage metrics, and working with design engineers to debug tests and ensure functionality. The ideal candidate will have experience in ASIC performance verification, SystemVerilog Assertions (SVA), and assertion-based verification, along with knowledge of image processing or multimedia IPs. The position requires a strong understanding of ASIC standard interfaces and memory system architecture, and contributes to the innovation behind Google's consumer products.