Senior Analog Layout Design Engineer

2 Months ago • 8 Years + • Research & Development

Job Summary

Job Description

NVIDIA's Analog Layout design team seeks a Senior Analog Layout Design Engineer to contribute to high-speed mixed-signal circuit designs. Responsibilities include physical layout for mixed-signal functions (PLLs, high-speed I/O, SerDes, general I/Os, ESD structures) using Cadence tools in sub-micron CMOS FinFET technologies. Collaboration with ASIC and mixed-signal engineers for VLSI product integration is crucial. Duties encompass floor planning, custom layout, design rule verification, schematic checks, and EM/IR analysis. The ideal candidate possesses 8+ years of analog layout experience, expertise in Cadence tools, and a strong understanding of analog circuit layout concepts.
Must have:
  • 8+ years analog layout experience
  • Cadence Virtuoso expertise
  • Submicron CMOS technology understanding
  • DRC/LVS experience
  • Teamwork and communication skills
Good to have:
  • Python scripting
  • EM/IR tool knowledge
  • DRC/LVS deck customization

Job Details

NVIDIA Analog Layout design team is looking for a Senior Analog Layout Design Engineer – someone who is excited to join a growing group of diverse individuals responsible for handling challenge high-speed mixed-signal circuit designs. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence.

What you'll be doing:

  • Perform physical layout for mixed-signal functions like PLL's, high speed I/O circuits, SerDes, general I/O's, ESD structures designs in state-of-the-art sub-micron CMOS FinFET technologies using Cadence tools

  • You will work with ASIC and mixed-signal engineers to customize designs for integration in VLSI products.

  • Job duties will include floor planning, custom layout and verifying against design rules and schematics, EM/IR analysis

What we need to see:

  • You will have a minimum of 8 years of relevant mask analog layout experience

  • An Electronics Practical Engineer certificate or a B.Sc. in Electrical Engineering

  • Proven understanding of analog circuit layout concepts in submicron CMOS technologies - such as Operational Amplifiers and ADC/DACs.

  • You are an expert with Cadence custom circuit design tools - particularly Virtuoso

  • Experience running and debugging DRC and LVS with verification tools such as ICV, Calibre

  • You can work effectively in a team, good interpersonal skills, enthusiasm and positive energy.

Ways to stand out in the crowd:

  • Proficiency in scripting languages like python, skill

  • Knowledge of DRC and LVS checking flows, EM/IR tools, ability to customize DRC and LVS decks

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. Are you creative and autonomous? Do you love the challenge of crafting the securest silicon possible? If so, we want to hear from you. Come, join our ASIC Security team and help build the real-time, cost-effective computing platform driving our success across several exciting and quickly growing fields.

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About The Company

Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.

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