Coherent Interconnect Microarchitecture & Logic Design - Full Time
Job Summary
Job Description
Rivos seeks Interconnect/Fabric Design experts to build high-performance RISC-V systems. Responsibilities include microarchitecture development, RTL design, and validation. Must have expertise in large-scale on-chip interconnect architecture, cache coherence, and on-chip network protocols like AMBA, AXI, etc.
Must have:
- Interconnect Architecture
- Cache Coherence
- On-chip Protocols
- RTL Design
Good to have:
- System Caches
- Directory Snoop
- Network Topologies
- SystemVerilog
Job Details
Rivos is on a mission to build the best RISC-V enterprise systems in the world with class leading performance, power, security and RAS features. We are seeking Interconnect/Fabric Design experts to join our team in building the best RISC-V compute systems in the world.
Responsibilities
- Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
- Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
- Validation - support test bench development and simulation for functional and performance verification
- Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance
- Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
Requirements
- Thorough knowledge of large scale on-chip coherent or non-coherent interconnect/fabric architecture
- Knowledge of one or more on-chip network protocols: AMBA, AXI, CHI, ACE, Tilelink, APB or similar protocols
- Knowledge of cache coherent memory systems and interconnect
- Knowledge of system caches and directory snoop filter protocols
- Familiarity with different on-chip network topologies: mesh, ring, crossbar, etc
- Understanding of high performance and low power microarchitecture techniques and trade-offs
- Proficiency in SystemVerilog or Verilog RTL coding
- Knowledge of logic design principles along with timing and power implications
- Experience with simulators and waveform debugging tools
Similar Jobs
Meta
Burlingame, California, United States (On-Site)
• 3 Months ago
Riot Games
Los Angeles, California, United States (Remote)
• 3 Months ago
Bengaluru, Karnataka, India (On-Site)
• 3 Months ago
Regent Craft
North Kingstown, Rhode Island, United States (On-Site)
• 4 Months ago
Get notifed when new similar jobs are uploaded
Similar Skill Jobs
Looks like we're out of matches
Set up an alert and we'll send you similar jobs the moment they appear!
Jobs in Santa Clara, California, United States
Fabric
Seattle, Washington, United States (On-Site)
• 4 Months ago
Glean
Palo Alto, California, United States (On-Site)
• 3 Months ago
The Walt Disney Company
New York, New York, United States (Hybrid)
• 3 Months ago
Aristocrat Gaming
Las Vegas, Nevada, United States (On-Site)
• 5 Months ago
Next Level Business Services
Cincinnati, Ohio, United States (On-Site)
• 4 Months ago
Get notifed when new similar jobs are uploaded
Research & Development Jobs
Intel Corporation
Austin, Texas, United States (On-Site)
• 3 Months ago
ByteDance
San Jose, California, United States (On-Site)
• 3 Months ago
Meta
Bellevue, Washington, United States (On-Site)
• 3 Months ago
Nielsen
Bengaluru, Karnataka, India (Hybrid)
• 4 Months ago
Meta
Seattle, Washington, United States (On-Site)
• 3 Months ago
Get notifed when new similar jobs are uploaded
