Silicon Interposer Design Flow Development Intern
Job Summary
Job Description
This internship focuses on developing design flows for silicon interposers, covering the entire process from netlist to GDS. Responsibilities include creating unit cells, automating signal/shielding routing, developing flows for electrical model extraction, DRC, LVS, and 3DIC design using 3Dblox. The role involves interacting with EDA vendors to resolve issues and evaluate tools, as well as collaborating with silicon manufacturers to implement verification tools based on design rules. The ideal candidate should have a strong foundation in VLSI, ASIC, and EDA, along with scripting skills in Shell, Tcl, and Python, and a basic understanding of silicon interposer technology.
Must have:
- Strong technical background in VLSI, ASIC, and EDA.
- Experience with EDA tools (Innovus, Virtuoso, Calibre/Pegasus, Quantus, Voltus).
- Strong scripting skills (Shell, Tcl, Python).
- Basic understanding of silicon interposer technology.
- Excellent problem-solving and communication skills.
- Highly self-motivated with minimal supervision.
- Ability to work well in a team and meet aggressive schedules.
3 skills required
Job Details
An intern position focused on developing the design flows for the silicon interposer, from
netlist to GDS including but not limited to prototyping, unit cell creation, bump
management, place and route, electrical extraction and analysis, DRC, and LVS.
Responsibilities
- As a Silicon Interposer Design Flow Development intern, you will own or participate in the following:
- Create unit cells used in the Si interposer.
- Develop scripts to automate the signal/shielding routings on interposer.
- Develop flows to extract electrical models for SI and PI analysis.
- Develop flows to perform DRC and LVS for the interposer.
- Develop 3DIC design flows based on the 3Dblox language.
- Interface with EDA vendors to solve issues, evaluate tools and improve the flow.
- Work with silicon manufacturers to understand design rules and implement verification tools.
Requirements
- Strong technical background in VLSI, ASIC and EDA fundamentals.
- Experiences with EDA tools such as Innovus, Virtuoso, Calibre/Pegasus, Quantus, Voltus etc.
- Strong scripting skills in multiple languages (Shell and Tcl, Python).
- Basic understanding of silicon interposer technology.
- Excellent skills in problem solving, written and verbal communication, excellent organization skills, highly self-motivated and self-starter with minimum supervision.
- Ability to work well in a team and be productive under aggressive schedules.
Education and Experience
- Current student for PhD or Master’s Degree.
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