Design Verification Engineer, Silicon

2 Hours ago β€’ All levels β€’ Research & Development

About the job

Job Description

Google is seeking a Design Verification Engineer to join their team developing custom silicon solutions for direct-to-consumer products. Responsibilities include planning verification of digital design blocks, understanding design specifications, and collaborating with design engineers. The role involves creating and enhancing constrained-random verification environments using SystemVerilog and UVM, or formally verifying designs with SVAs and industry tools. Other responsibilities include identifying and writing coverage measures, debugging tests, closing coverage measures, and identifying verification holes. The ideal candidate will have experience with verification methodologies and languages like UVM and SystemVerilog. A Bachelor's degree in a relevant field is required, with a Master's or PhD preferred.
Must have:
  • Bachelor's degree in relevant field
  • Experience with UVM or SystemVerilog
  • Verification methodologies knowledge
  • Testbench, testcase, test environment development
Good to have:
  • Master's/PhD in Electrical Engineering/Computer Science
  • Low-power design verification experience
  • Formal verification experience (SVA)
  • Experience with industry-leading formal tools
Perks:
  • Bonus
  • Equity
  • Benefits
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Minimum qualifications:

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
  • Experience with verification methodologies and languages such as Universal Vefication Methodology (UVM) or SystemVerilog.

Preferred qualifications:

  • Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
  • Experience in low-power design verification.
  • Experience developing and maintaining verification test-benches, test-cases, and test-environments.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

The US base salary range for this full-time position is $108,000-$158,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. The range displayed on each job posting reflects the minimum and maximum target salaries for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits.Learn more about .

Responsibilities

  • Plan the verification of digital design blocks by fully understanding the design specification and interacting with design engineers to identify important verification scenarios.
  • Create and enhance constrained-random verification environments using SystemVerilog and Universal Vefication Methodology (UVM) or formally verify designs with SystemVerilog Assertions (SVA) and industry leading formal tools.
  • Identify and write all types of coverage measures for stimulus and corner-cases.
  • Debug tests with design engineers to deliver correct design blocks.
  • Close coverage measures to identify verification holes and to show progress towards tape-out.
View Full Job Description
$108.0K - $158.0K/yr (Outscal est.)
$133.0K/yr avg.
Worldwide

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About The Company

A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.

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