Senior Memory Controller Verification Engineer

2 Months ago • 5 Years + • Research & Development

Job Summary

Job Description

NVIDIA seeks a Senior Memory Controller Verification Engineer to join its Tegra SoC team. Responsibilities include partnering with design teams, developing verification test plans and infrastructure (testbenches, BFMs, checkers, monitors), ensuring code and functional coverage, collaborating with DRAM vendors, working with FPGA and software teams, and participating in post-silicon verification and debug. The role involves verifying the correctness of the design and requires experience with DDR and LPDDR memories. This position impacts multiple product lines across various sectors.
Must have:
  • 5+ years ASIC verification experience
  • DDR/LPDDR memory controller experience
  • SystemVerilog and UVM
  • VCS or equivalent simulation tools
  • Testbench development and implementation
Good to have:
  • Strong C/C++ programming
  • Python/Perl/shell scripting
  • Debugging and problem-solving skills
  • FPGA experience
Perks:
  • Equity
  • Benefits

Job Details

NVIDIA is seeking hardworking and creative Senior Memory Controller Verification Engineer for our Tegra SoCs! At Nvidia, we have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing. In this position, you will partner with the design team and help make the right implementation choices, craft and implement verification test plans, maintain regressions, close coverage and sign off design for tape-out. This position offers the opportunity to have a real impact on multiple product lines including consumer graphics, self-driving cars, HPC, cloud computing, and AI!

What you’ll be doing:

  • As a senior member of our verification team, you'll understand the design & implementation, define the verification scope, develop the verification infrastructure (Testbenches, BFMs, Checkers, Monitors), come up with and implement test/coverage plans, and verify the correctness of the design.

  • Collaborate with NVIDIA memory controller designers and DRAM vendors to bringup/debug challenging issues related to the next generation of LPDDR and DDR memories

  • Ensure code and functional coverage of all the RTL which you will verify.

  • Work with and enable FPGA and software teams to ensure that software is tested.

  • Be involved with post-silicon verification and debug.

What we need to see:

  • BS / MS or equivalent experience.

  • 5+ years of hands-on ASIC verification of challenging design units over multiple projects displaying good attention to detail, teamwork, problem solving and proven success

  • Prior Design or Verification experience of dynamic memory controllers (ddr{2, 3, 4, 5}, lpddr{2, 3,4,5, 6})

  • Exposure to design and verification tools (VCS or equivalent simulation tools, debug tools like Debussy, GDB).

  • Background with System Verilog and UVM based methodology for ASIC verification.

Ways to stand out from the crowd:

  • Strong C/C++ programming experience

  • Proficiency in debugging and resolving issues

  • Scripting knowledge (Python/Perl/shell).

  • Good interpersonal skills and ability & desire to work as a part of a team.

The base salary range is 105,000 CAD - 221,000 CAD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.

You will also be eligible for equity and benefits. NVIDIA accepts applications on an ongoing basis.

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About The Company

Since its founding in 1993, NVIDIA (NASDAQ: NVDA) has been a pioneer in accelerated computing. The company’s invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined computer graphics, ignited the era of modern AI and is fueling the creation of the metaverse. NVIDIA is now a full-stack computing company with data-center-scale offerings that are reshaping industry.

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