TPU Microarchitecture Design Lead
Job Summary
Job Description
- 8+ years RTL design (Verilog/System Verilog)
- 4+ years leading IP/SoC design teams
- Experience with ARM-based SoCs and ASIC methodology
- Machine learning IP design expertise
- Microarchitecture definition and data flow specification
- Master's or PhD in relevant field
- 15+ years of IP design experience (ML, Neural Processors, Multimedia, or GPUs)
- Low power estimation, timing closure, and synthesis experience
- Experience leading technical teams
- Ability to drive multi-generational IP roadmap
1 skill required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
- 8 years of experience with RTL design using Verilog/System Verilog and microarchitecture.
- 4 years of experience in leading IP/SoC design teams.
- Experience with ARM-based SoCs, interconnects, and ASIC methodology.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- 15 years of experience with IP design for IPs in Machine learning, Neural Processors, Multimedia, or GPUs.
- Experience with methodologies for low power estimation, timing closure, and synthesis.
- Experience leading technical teams.
- Ability to drive a multi-generational roadmap for IP development.
About the job
Google engineers develop the next-generation technologies that change how users connect, explore, and interact with information and one another. As a member of an extraordinarily creative, motivated and talented team, you develop new products that are used by millions of people. We need our engineers to be versatile and passionate to take on new problems as we continue to push technology forward. If you get excited about building new things and working across discipline lines, then our team might be your next career step.
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Technically lead a project team that delivers Machine Learning IPs for Google Silicon SoCs.
- Define microarchitecture details for Machine learning processors and accelerators along with specification of data flows and integration requirements for Subsystem Development.
- Oversee RTL development, and debug functional/performance simulations.
- Meet schedule commitments and provide support to customers.
- Participate in synthesis, timing/power estimation, and FPGA/silicon bring-up.
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