Senior Analog IP Design Engineer

4 Months ago • 2 Years +

Job Summary

Job Description

Cadence seeks a Senior Analog IP Design Engineer with 2+ years of experience in CMOS IC development, including spec definition, design, verification, and production testing. Expertise in High-Speed SerDes, ADC/DAC, PLL, LDO, BandGap, Power Management, and MIPI is essential. Strong understanding of design for mass production and test is required.
Must have:
  • CMOS IC Development
  • High Speed SerDes
  • Analog IC Layout
  • Design for Test
Good to have:
  • Spectre/RF
  • ADS
  • Matlab
  • Simulink
Perks:
  • Competitive Salary
  • Professional Development

Job Details

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Job Description

Principal Analog IP Design Engineer

WARSAW / POLAND

  • At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology

The successful candidate will take the responsibility for the development and customization of analog IP blocks and subsystems as well as architectural design of larger systems while providing high-quality consistently and reliably, in a customer driven environment. Other responsibilities will include the participation in spec definition and effort estimations, interface with the layout teams on and offsite, produce and present design review documentation according to the internal quality flows and as required to support costumer requirements.

Being an integral member of our team will give opportunity to work with industry leading semiconductor and system companies worldwide to help drive Cadence’s market leading System and Verification technologies.

The candidate should have:

  • 2 years of experience in the job offered or a relevant suitable combination of education, training and experience,

  • Knowledge of the CMOS IC development process – from spec definition, design, post layout verification, manufacture, characterization and production test,

  • Knowledge in following areas: High Speed SerDes, ADC and DAC, PLL, LDO, BandGap, Power Management, MIPI and other Interface IPs

  • Relevant experience in 40nm design or in more advanced process nodes

  • A strong understanding of design for mass production and for test

  • Knowledge of simulation and modelling tools such as Spectre/RF, ADS, Matlab and Simulink

  • Knowledge of Analog IC Layout techniques, matching, signal integrity, parasitics, etc.

  • Ability to work independently, being able to collaborate remotely with team members outside of Poland.

  • Flexibility in working on multiple projects in parallel.

Check what we can offer you:

·        Competitive salary package adequate to competencies 

·        Copyrights tax relief procedure implemented in salary calculations

·        Flexible working hours 

·        Work from office or hybrid 

·        Continuous professional development: trainings and seminars 

·        Possibility to cooperate with people from around the world in an expanding global organization 

·        Employee Stock Purchase Plan, bonuses and stocks 

·        Private medical care 

·        Life insurance 

·        Multisport Plus cards 

·        Social Fund benefits 

·        Recommendation bonuses & internal recognition program 

·        Additional paid days off and recharge days

·       And much more, so do not hesitate to contact us

Are you looking for continued professional development? Do you want to create solutions that will influence the development of exciting new technology? If so, join our team!

We’re doing work that matters. Help us solve what others can’t.

Make your mark.

Please provide the following information in your CV: „I hereby agree to the processing of personal data included in my application for the needs necessary to carry out the recruitment process by Cadence Design Systems in accordance with art. 6 par. 1 lit. a Regulation (EU) 2016/679 of the European Parliament and of the Council of 27 April 2016 on the protection of individuals with regard to the processing of personal data and on the free movement of such data and repealing Directive 95/46/EC (General Data Protection Regulation).”I also consent to processing of my personal data

We’re doing work that matters. Help us solve what others can’t.

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