Silicon Physical Design and Implementation Engineer

This role involves developing all aspects of Application-Specific Integrated Circuit (ASIC) RTL2GDS implementation for high Power Performance Area (PPA) designs. Responsibilities include managing block and full-chip level physical implementation and QoR (power, timing, area), and collaborating with cross-functional teams to improve PPAs in physical design. The ideal candidate will have 3+ years of experience with physical design methodology and flow validation/development, experience with floor planning and physical design tool automation using PnR tools and scripting (Tcl/Perl/Shell/Python). A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field is required. The position is located in Bengaluru, Karnataka, India and is part of a diverse team developing custom silicon solutions for Google's products.