ASIC Engineer, Design
Job Summary
Job Description
- 15+ years experience in micro-architecture and RTL development
- Bachelor's degree in CS, CE, or related field
- RTL development using Verilog, System Verilog, and HLS
- Collaboration with verification and implementation teams
- Experience leading complex SOCs or IP subsystems
- Experience in data path development
- Experience with CPU, network protocols, NOC, memory, and peripheral subsystems
- Experience with synthesis, timing closure, and formal verification methodology
- Master's or PhD in EE or CS
- Bonus
- Equity
- Benefits
2 skills required
Job Details
- Architecture exploration
- Micro-architecture development
- RTL development using Verilog, System Verilog and HLS
- Soft and hard IP identification, selection and integration
- Collaboration with verification and emulation teams in test plan development and debug
- Collaboration with implementation team to close the design on timing and power
- 15+ years of experience in micro-architecture and RTL development for complex control and data path IPs
- Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.
- Experience in leading complex SOCs or IP subsystems
- Experience in data path development
- Experience in CPU, Network protocols, NOC, Memory and Peripheral Subsystems
- Experience with Synthesis, Timing Closure and Formal Verification Methodology
- Master’s or PhD degree in Electrical Engineering, Computer Science or related areas
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