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CMOS Device Engineer, Silicon

New Taipei City, Taiwan (On-site)

CMOS Device Engineer, Silicon

6 Days ago • 5-7 Years • Research & Development

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Job Description

This role involves analyzing device and process data for test chips and product silicon using CMOS technology from leading foundries. Responsibilities include conducting transistor and circuit-level simulations for benchmarking and PPA evaluation, coordinating with various teams on product bring-up, yield issue debugging, and power/performance improvements. The engineer will analyze foundry data, correlating it with product KPIs for methodology improvement and process/product co-optimization. The position requires expertise in CMOS device characterization, process integration, and modeling/simulation, along with statistical analysis experience. The ideal candidate will contribute to the innovation behind Google's hardware, delivering unparalleled performance, efficiency, and integration.

Must have:

5+ years CMOS technology development experience
CMOS device characterization, process integration
Modeling/simulation, statistical analysis (JMP)
Analyze device and process data
Coordinate with IP design, power, and test teams

Good to have:

PhD in Electrical Engineering (semiconductors/microelectronics)
7+ years experience in Foundry and Fabless environment
Product-level testing experience (SoC, yield, parametric evaluation)

Minimum qualifications:

Bachelor's degree in Electrical Engineering, Mechanical Engineering, Materials Science, Chemical Engineering, related degree or equivalent practical experience.
5 years of experience in CMOS technology development.
Experience in CMOS device characterization, process integration and modeling/simulation.
Statistical analysis experience in JMP

Preferred qualifications:

PhD degree in Electrical Engineering with a specialization in semiconductors/microelectronics or equivalent practical experience.
7 years of experience in the Foundry and Fabless environment.
Experience in product-level testing in SoC including yield and parametric evaluation.
Excellent work ethic, communication and time management skills.

About the job

Be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

Analyze the device and process data for test chips and product Silicon, leveraging Complementary Metal–Oxide–Semiconductor (CMOS) technology from leading foundries.
Conduct tansistor and circuit-level simulations for technology node benchmarking and power, performance, and area (PPA) evaluation.
Coordinate with IP design, power, and test teams on product bring up, yield issue debug and power/performance improvement.
Analyze foundry data and correlate it with product KPIs for methodology improvement and process and product co-optimization.

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About The Company

Google

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A problem isn't truly solved until it's solved for all. Googlers build products that help create opportunities for everyone, whether down the street or across the globe. Bring your insight, imagination and a healthy disregard for the impossible. Bring everything that makes you unique. Together, we can build for everyone.