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Sr. Staff/Lead Engineer – RTOS – CPU/Platform Software Team

Maharashtra, India (On-site)

Sr. Staff/Lead Engineer – RTOS – CPU/Platform Software Team

4 Months ago • 5 Years + • Research & Development

Job Summary

Job Description

Lead RTOS software development for RISC-V CPUs. Experience with FreeRTOS, baremetal, and debugging multicore systems required. Strong C/C++ and assembly programming skills essential. Contribute to the RISC-V ecosystem and collaborate with hardware teams.

Must have:

RTOS experience
C/C++ programming
Baremetal dev
Multicore debug

Good to have:

FreeRTOS
Zephyr OS
Device drivers
Virtualization

Perks:

Growth path
RISC-V learning

10 skills required

10 skills required for this role

Add these skills to join the top 1% applicants for this job

shell

cpp

prototyping

github

git

linux

fpga

scalability

networking

talent-acquisition

Job Details

Join the RISC-V Revolution!

We are seeking highly skilled Software Engineers to join our team and help us build Software Components for our RISC-V-based CPUs/Platforms. In these roles you will be involved in various aspects of CPU / Platform Software stack, from Bare metal, RTOS, Linux boot/kernel, reference libraries, tooling, simulators, FPGA based bring -up, performance benchmarks etc... You may also work directly with customers at all stages, including onboarding, support, and troubleshooting.

This is an exciting opportunity to work in a dynamic environment, involving interaction with many of MIPS’s engineering teams, including systems, architecture, hardware and software as we build both hardware and software grounds up!

Our aim is to build software components that not only allow our IP solutions to be well tested but also provide our customers and partners with a robust repository of software to kick start their assimilation of MIPS IP and allowing them to obtain the highest performance from hardware and software synergy.

If you are an innovative problem solver with a deep passion for embedded software and compute technologies, and love building things from grounds up, we want to hear from you!

As our mission goes, we are committed to offering “Freedom to Innovate Compute” – Join us in this mission to accelerate your impact to the larger industry and hence your growth

You will:

Lead a team of 3-5 members responsible for baremetal/RTOS software development –

Mentor and Guide team members for day-day technical tasks.

Work with cross functional stakeholders from systems, business teams. Create project plan, track and share progress, risks.

Be responsible for the design and implementation of software in one or more of the following areas:

CPU firmware such as bootloaders and secure platform management

RTOS ports for MIPS CPUs – FreeRTOS and other relevant OS support on MIPS Microcontroller and Processors Cores.

Deploying pre-existing benchmarks like EEMBC (CoreMark, SecureMark and other applicable) or developing new ones as per customer needs

Contribute to the wider RISC-V software ecosystem, helping to ensure support for the architecture in various open-source projects
Use emulators and real hardware to analyse and optimise software, including through the use of RISC-V’s vector instructions
Code-review complex contributions in any of these areas
Interact with architecture and hardware design teams to improve our next RISC-V CPU cores – provide inputs, drive architectural decisions based on software needs.
Help maintain the documentation and reference implementations that our customers rely on
Release SDK’s and work with customers to enable prototyping of their SoCs for evaluation and software development

Ideally, you’ll have:

5+ years of practical experience in embedded software development/debug.
Strong C or C++ programming experience, basic assembly level programming
Knowledge of basic Operating System concepts (e.g. virtual memory, interrupt handling, privilege levels)

Experience developing architecture-level code or device drivers in C on baremetal, RTOS platforms.

Proven experience with RTOS (FreeRTOS, Zephyr etc.) on different CPU architectures (RISC V experience would be great!)

Experience debugging complex multicore systems, experience with debugging tools (OpenOCD, Segger J-Link, Lauterbach)
Experience with git, Makefile, GNU toolchain and shell scripting
Experience with device drivers, virtualization, IOMMUs, power management or SoC platform security
Experience working with hardware architecture and engineering teams
Strong communication, co-working, and listening skills

Here’s what you can expect from us:

At MIPS, you’ll be a member of a fast-growing team of technologists that are creating the industry’s highest performance RISC-V processors. Small teams that are part of a non-compartmentalized structure – you’ll be able to understand and have an impact on the bigger picture. A great deal of autonomy, with support from some of the industry’s most experienced CPU engineers. An unlimited growth path – with the right skills, you can decide where you want to expand and grow in your role at MIPS. The opportunity to learn a great deal about the blossoming RISC-V architecture in cutting edge applications with industry leading customers.

At MIPS we provide meaningful benefits programs and products to our associates and their families. MIPS offers a competitive benefits package that includes medical, dental, vision, retirement savings, and paid leave!

More about us: