Accelerator Architect and Performance Engineer, Generative AI
Job Summary
Job Description
This role involves driving forward-looking Generative AI (GenAI) Machine Learning architecture exploration for Tensor mobile SoCs. Collaboration with research, system architecture, and compiler teams is crucial to optimize future workloads across the entire tech stack (hardware, software, use cases, network, and external components). Responsibilities include defining system architecture requirements for future GenAI use cases, applying advanced research to achieve power and performance improvements on GenAI workloads, and optimizing GenAI use case performance through model scheduling on TPU compute engines. The ideal candidate possesses extensive experience in computer architecture, performance, and compilers, coupled with expertise in Generative AI model architectures (LLMs, Vision Transformers, etc.). Proficiency in programming languages (C/C++, Python) and deep learning frameworks (TensorFlow/Jax/PyTorch) is essential.
Must have:
- Bachelor's degree in relevant field
- 8+ years experience in computer architecture/performance/compiler
- GenAI model architecture experience
- Programming in C/C++ or Python and deep learning frameworks
- Collaboration with research and engineering teams
- Optimize GenAI performance on TPUs
Good to have:
- Master's or PhD in relevant field
- Experience with domain-specific accelerators
- Distributed/parallel programming experience
- Hardware/software co-design experience for ML
- Simulator development and micro-architecture experience
- Excellent communication skills
6 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 8 years of work or academic research experience in computer or chip architecture, performance, or compiler.
- Experience with Generative AI model architectures (e.g., Large Language Models, Vision Transformers, Image Diffusion Models, etc.).
- Experience with one or more general purpose programming languages including (but not limited to) C/C++ or Python and deep learning frameworks like TensorFlow/Jax/Pytorch.
Preferred qualifications:
- Master's degree or PhD in Electrical Engineering, Computer Engineering or Computer Science, with an emphasis on computer architecture.
- Experience with domain-specific accelerators.
- Experience with distributed/parallel programming.
- Experience with hardware/software co-design for machine learning.
- Experience with simulator development and micro-architecture.
- Excellent communication skills.
About the job
Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Drive forward-looking GenAI Machine Learning architecture exploration for Tensor mobile SoCs while collaborating with research teams, system architecture teams, and compiler engineers to optimize future workloads from both all perspectives across the tech stack including hardware, software, use case, network, and external components.
- Work with researchers and Program Management teams to define system architecture requirements for future Generative AI use cases.
- Apply advanced research in architecture and process technology to get breakthrough power and performance improvements on Generative AI workloads.
- Optimize performance of GenAI use cases by defining an optimal model scheduling on the TPU compute engines.
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