Principal Engineer

About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

Infrastructure Processor Business Unit, a part of Networking and Processor Business Group, encompasses OCTEON and the award-winning OCTEON Fusion-M® product families. The SoC family of multi-core CPU processors and Radio Access SoCs offer best-in-class performance, low power, rich software ecosystem, virtualization features, and open source application support with highly optimized custom ARM CPU cores providing an excellent solution for a highly flexible end-to-end optimized 5G platform. As part of the Infrastructure Processor unit at Marvell, you will verify all of the circuitry that goes inside our chips for the general market and for specific customers. These chips use cutting-edge technology to facilitate data transfers at high speeds, and you will help verify that each design meets our customers’ specifications whether they’re a major telecom organization or automotive company, etc.

What You Can Expect

• Conduct review phase in every SOC/Subsystem verification phases, to achieve desire quality + on-schedule deliverables and SOC/Subsystem verification process improvement.
• SOC & Sub system verification activities and should have participated in successful completion of SOC/Subsystem projects across all phases from SOC/Subsystem Specification to Silicon.
• Responsible for complete SOC/Subsystem verification activities like develop verification architecture and verification plan, develop UVM based testbench, Integrate in-house verification components + complex
• VIP’s integration( ARM, Cadence, Synopsys, etc), develop test case(UVM & assembly), verify and coverage analysis in RTL and gate level design.
• Mentor junior engineers and technically guide and monitor them on their day-to-day technical tasks.
• Work effectively with a global team and be self-motivated to manage deliverables.
• Communicate clearly both verbally and in writing.
• Excellent collaborator

What We're Looking For

• Bachelor’s degree in computer science, Electrical Engineering or related fields and 12-18 years of related professional experience.
• Master’s degree and/or PhD in Computer Science, Electrical Engineering or related fields with 10-18 years of experience.
• Experience with assertion-based formal verification tools.
• Proficient programming in scripting languages such as tcl and Perl.
• Understanding of hardware emulation support.
• Familiarity with TLMs in SystemC.
• Experience in Version tools like CVS, SVN, GIT etExperience in SOC/Subsys level (rather than block level) verification of ARM-based SOCs.
• Knowledgeable of ARM architecture and AMBA bus standards like AXI-4, CHI and ACE.
• Experience with industry standard interfaces such as DDR, eMMC, PCIE, Ethernet and USB.
• Experience coding UVM SOC/Subsys level testbenches, BFM, scoreboards, monitors, etc.
• Proficient in writing and debugging tests in UVM as well as C.
• Exposure to Cadence, Synopsys, Mentor and/or ARM verification tools.

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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