Floating Point Logic Design

1 Minute ago • All levels

Job Summary

Job Description

Rivos is seeking a Floating Point & Logic Design Engineer to contribute to microarchitecture development, RTL design, and physical design implementation. The role involves optimizing for power, performance, area, and timing, supporting validation, and exploring high-performance strategies. Candidates should have expertise in CPU or AI accelerator design, IEEE-754, and complex mathematical function coding. A PhD, Master’s, or Bachelor’s Degree in a technical discipline is required.
Must have:
  • Microarchitecture development and specification
  • Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
  • Design delivery - work with multi-functional engineering team to implement and validate physical design
  • Validation - support test bench development and simulation for functional and performance verification
  • Performance exploration and correlation - explore high performance strategies and validate RTL design meets targeted performance
  • Thorough knowledge of CPU or AI accelerator design work experience
  • In-depth knowledge of IEEE-754, and experience in optimizing FMA operations
  • Creativity in designing various implementation methods to balance performance, power, and area
  • Expertise in coding complex mathematical functions (logarithms, exponentials, etc.) at a very fine level of precision using C or other high-level programming languages
  • Working knowledge of Hector, c2rtl, or similar tools used for formal verification
  • Understanding the algorithms used in common ALUs like multipliers and the tradeoff between area and power
  • Knowledge of System Verilog
  • Experience with simulators and waveform debugging tools
  • Knowledge of logic design principles along with timing and power implications
  • Understanding of low power microarchitecture techniques
  • Understanding of high performance techniques and trade-offs in a CPU microarchitecture
  • Experience in C or C++ programming

Job Details

Responsibilities

  • As a Floating Point & Logic Design Engineer, you will own or participate in the following:
  • Microarchitecture development and specification - from early high-level architectural exploration through micro architectural research and arriving at a detailed specification
  • Development, assessment, and refinement of RTL design to target power, performance, area, and timing goals
  • Design delivery - work with multi-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power
  • Validation - support test bench development and simulation for functional and performance verification
  • Performance exploration and correlation - explore high performance strategies and validate that the RTL design meets targeted performance

Requirements

  • Thorough knowledge of CPU or AI accelerator design work experience in one or more of the following areas:
  • In-depth knowledge of IEEE-754, and experience in optimizing FMA operations.
  • Creativity in designing various implementation methods to balance performance, power, and area when dealing with both integer and floating point operations for high performance, energy efficient components.
  • Expertise in coding complex mathematical functions (such as logarithms, exponentials, etc.) at a very fine level of precision using C or other high-level programming languages.
  • Working knowledge of Hector, c2rtl, or similar tools used for formal verification.
  • Understanding the algorithms used in common ALUs like multipliers and the tradeoff between area and power.
  • Knowledge of System Verilog
  • Experience with simulators and waveform debugging tools
  • Knowledge of logic design principles along with timing and power implications
  • Understanding of low power microarchitecture techniques
  • Understanding of high performance techniques and trade-offs in a CPU microarchitecture
  • Experience in C or C++ programming

Education and Experience

  • PhD, Master’s Degree or Bachelor’s Degree in technical subject area.

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About The Company

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Santa Clara, California, United States (Hybrid)

Santa Clara, California, United States (Hybrid)

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