This full-time Silicon Logic Formal Verification role in Bangalore, India, involves the formal verification of high-performance RISC-V cores, coherent fabrics, and accelerator designs. Key responsibilities include working with architects and RTL design engineers to identify and verify artifacts, proving functional and security properties, finding design bugs, and developing formal abstract models and innovative verification flows. Candidates should possess a solid understanding of temporal assertion properties, hands-on experience with model checking tools, and strong problem-solving and communication skills.