Oversees definition, design, verification, and documentation for ASIC development.
Determines architecture design, logic design, and system simulation.
Defines module interfaces/formats for design and SoC Integration.
Evaluates all aspects of the process flow from high-level design to synthesis, timing and power use.
Must have knowledge in micro architecture, work with architecture teams to come up with configuration for IP and document system level flows and hands on design using Verilog/SystemVerilog. Should have knowledge in SoC design, methodologies and sign off process.
Exp - 9+Years
Location - Bangalore/Hyderabad
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