SoC and IP Design Engineer

Minimum qualifications:

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience.
• 3 years of experience with digital logic design principles, Register-Transfer Level (RTL) design concepts, and languages such as Verilog or System Verilog.
• Experience with logic synthesis techniques to optimize Register-Transfer Level (RTL) code, performance and power as well as low-power design techniques.
• Experience in logic design and debug with Design Verification (DV).

Preferred qualifications:

• Experience with design sign off and quality tools (e.g., Lint, Cyber Defense Center (CDC), etc.).
• Experience with a scripting language like Python or Perl.
• Knowledge in one of these areas, PCIe, UCIe, DDR, AXI, ARM processors family.
• Knowledge of SOC architecture and assertion-based formal verification.
• Knowledge of high performance and low power design techniques.