Display Manufacturing Test and Partnerships Lead
Job Summary
Job Description
- 10+ years in optoelectronic manufacturing test
- 5+ years leading cross-functional teams
- Experience developing/implementing optoelectronic test solutions
- Expertise in display panel test flows
- HVM test strategy development
- Test partner management
- Experience with wafer-level testing of LEDs
- Proficiency in Labview, SQL, C#, Python
- Optical hardware test debugging & failure analysis
- People management in early NPI optoelectronic environments
- Bonus
- Equity
- Benefits
6 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical/Computer Engineering, Physics, a related field, or equivalent practical experience.
- 10 years of experience in an optoelectronic manufacturing test environment, or 8 years with advanced degree.
- 5 years of experience leading cross-functional teams and driving manufacturing test partnerships with vendors/suppliers.
- Experience developing and implementing optoelectronic test hardware and software solutions and optimizing manufacturing test processes.
Preferred qualifications:
- 10 years of experience with test supplier management, managing CM partners for optoelectronics or display testing.
- Experience in optical hardware test debugging, troubleshooting and failure analysis investigation.
- Experience in wafer-level testing of LED or optoelectronic devices.
- Experience in people management and demonstrated ability to deliver results in a highly cross-functional early NPI optoelectronic environment.
- Proficiency in test software development including familiarity with Labview, SQL, C#, Python, etc.
- Familiarity with best-practices in display test and calibration, machine goal systems, guarded and low-noise electrical measurements.
About the job
In this role, you will help identify suitable partners and deploy a comprehensive test solution for microLED-based Display Panels in High Volume Manufacturing (HVM) at Contract Manufacturers (CMs) and Offshore Assembly and Test Houses (OSATs).
You will own all aspects of HVM testing and will work closely with cross-functional teams to optimize test coverage in production and to deliver high quality panels to customers. You will need an in-depth understanding of optoelectronic or display panel test flows. You will work with various groups in releasing cost-effective production test solutions into mass production.
Google's Raxium display group has established a revolutionary semiconductor materials display technology that enables new functionality in display products, bringing to users a closer and more natural linkage between the digital and physical realms in applications such as augmented reality (AR) and light-field display. With start-up roots and a state-of-the-art compound semiconductor fab in Silicon Valley, Raxium is seeking to build upon its engineering team with an aim to disrupt next-generation display markets.
The US base salary range for this full-time position is $221,000-$311,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Develop HVM test strategy, identify suitable manufacturing test partners (CMs or OSATs), and work with the Raxium Supply Chain team in establishing engagement with the down selected test partner.
- Deploy a comprehensive test solution for microLED based Display Panels in HVM to the Manufacturing Test partners, including the associated data pipeline management.
- Collaborate with the internal Test Engineering teams and with the CM in developing test coverage, process controls, test fixture readiness, test-related SOP, cycle time/UPH, and line balance.
- Optimize test processes for yield and quality. Drive test-related yield improvement and test time reduction activities in HVM.
- Report on operational metrics for the HVM test area including evaluating hardware/software modifications to prevent and mitigate issues and drive operational improvements.
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