Senior Product Engineering Manager

Chief Responsibilities

• Responsible for leading continuous products margin enhancement through monthly yield review to closely monitor key indicators and drive action needed with Product and Test Engineers.
• Regular interface with internal Test, Quality, Package, as well as subcons and steer appropriate prioritization of our efforts.
• Instil robust discipline and formalized best practices within Asia Operations that will ensure we make deliver commitments without compromising yield and quality.
• Responsible for both Wafer Sort and Final Test operations and collaborate with HQ including Technology group to align on test method, limit setting, debug, FA and discrepant material disposition.
• Autonomously qualify new product derivatives through over temperature characterization. Work with various engineering groups at HQ to debug product/process/package issues.

• Conscientious, analytical, independent, and accurate work practices. Hand-on mentality and ability for problem solving.
• History of operating successfully in a high-volume production environment.
• Proven track record of problem solving and driving the resolution of poor yield and/or quality due to assembly, test and fab processes.
• Must have shown capability to develop and motivate their team to meet increasingly challenging objectives.
• Communication skills for working in cross-functional and international teams.
• Natural inclination towards statistical data analysis and able to guide their team on issue segmentation principles. Ability to learn and willingness to do further training, especially on YMS software like Spotfire and JMP.
• Travel as needed to several Asian factory locations (20% to 50%) 

• BSEE or equivalent, MSEE preferred.
• +5 years of Management experience overseeing an engineering team supporting Semiconductor Product Engineering and or Assy/Test.
• +10 years of engineering experience as a Product Engineer.
• Knowledge of and ability to support automated test equipment, wafer sort and final testing.
• Experience with CMOS circuit basics and device physics including BiCMOS is a plus.
• Experience with high voltage, high power testing is a plus.
• Bench equipment setups and bench evaluation of semiconductors experience is desired.
• English fluency, other languages desirable.