Technologist, ASIC Development Engineering ( CAD / PDK / PCELL / LVS ) 10+Years

3 Weeks ago • 10-15 Years

About the job

Summary_{By Outscal}

Western Digital is seeking a highly skilled Technologist with 10+ years of experience in ASIC development engineering. Expertise in Cadence SKILL, Calibre SVRF/TVF, Python, and Shell Scripting is essential. Strong understanding of PDKs, physical verification tools, and custom analog development flow is required.

About the job

Company Description

At Western Digital, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible.

At our core, Western Digital is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that. Our technology helped people put a man on the moon.

We are a key partner to some of the largest and highest growth organizations in the world. From energizing the most competitive gaming platforms, to enabling systems to make cities safer and cars smarter and more connected, to powering the data centers behind many of the world’s biggest companies and public cloud, Western Digital is fueling a brighter, smarter future.

Binge-watch any shows, use social media or shop online lately? You’ll find Western Digital supporting the storage infrastructure behind many of these platforms. And, that flash memory card that captures and preserves your most precious moments? That’s us, too.

We offer an expansive portfolio of technologies, storage devices and platforms for business and consumers alike. Our data-centric solutions are comprised of the Western Digital®, G-Technology™, SanDisk® and WD® brands.

Today’s exceptional challenges require your unique skills. It’s You & Western Digital. Together, we’re the next BIG thing in data.

Job Description

You are responsible for the further development of concepts and methods for the EDA design environments with focus on analog / mixed signal ASIC design in advanced nodes.

Solid understanding of PDK’s, effectively manage PDK libraries, collaterals and drive migration of design environments for incremental releases.

Development of Calibre Physical Verification decks for cmos PLANAR and FINFET technologies including DRC, LVS, PERC, FILL LPE and shape generation decks and scripts.

Layout Automation and Utilities development in Cadence SKILL/SKILL++.

Development and validation of PV tools and flows like parasitic extraction, EMIR drop and substrate noise analysis.

Responsibilities will include testing, validation, customer support and new tool/methods evaluations, development of methods and procedures for quality improvement, automation of deck/techFiles generation and validation.

Experience with Cadence custom IC Virtuoso platform to create layout test structures, to validate verification rules and to troubleshoot errors.

Experience with physical verification tools for DRC, LVS and parasitic extraction, Calibre, starRC, ICV etc is plus.

Working knowledge of revision control software (Git, Perforce, Subversion, Synchronicity, etc)

Collaboration with the IT team to fulfil advanced nodes specific requests (Linux, Exceed-on-Demand, Grid, VMWare-ESX, Storage-system, etc.).

Ensuring the operation and support within the CAD / IT-team for all ASIC designers worldwide.

Managing the quality and ISO26262 requirements for the EDA tools, both for in-house developments and vendor products.

Qualifications

Education: University degree (Master/PhD) in electrical engineering or a comparable subject

Personality and working practice: communicative, problem-solving mindset, responsible, initiative, flexible and target oriented. Comfortable in working in a fast paced, dynamic environment with changing priorities.

Experience and Knowledge: Minimum 10+ years of development experience of Mixed Signal CAD design Flows from Front to Back ,expert knowledge and experience of state-of-the-art design tools (EDA-vendors e.g. Cadence, Synopsys, Mentor) and Software-development-methodologies and tools (Linux, script- and programming-languages as well as Cadence Skill), thorough understanding of Custom Analog development flow, design tools and Software / Hardware environment

Qualifications: ability to identify and analyse tasks efficiently within the scope of your work and to develop pragmatic application-specific solutions; pronounced ability to communicate, relevant experience in the methodology of problem solving as well as in the cooperation and leadership of international and cross-functional teams

Technical Skills: Cadence SKILL, Calibre SVRF/TVF, Python, Shell Scripting.

Languages: fluent in English and German written and spoken

Additional Information

Western Digital thrives on the power and potential of diversity. As a global company, we believe the most effective way to embrace the diversity of our customers and communities is to mirror it from within. We believe the fusion of various perspectives results in the best outcomes for our employees, our company, our customers, and the world around us. We are committed to an inclusive environment where every individual can thrive through a sense of belonging, respect and contribution.

Western Digital is committed to offering opportunities to applicants with disabilities and ensuring all candidates can successfully navigate our careers website and our hiring process. Please contact us at staffingsupport@wdc.com to advise us of your accommodation request. In your email, please include a description of the specific accommodation you are requesting as well as the job title and requisition number of the position for which you are applying.