Senior Verification Engineer- Azure Core

Microsoft is building the fastest and most reliable networks for cloud computing and for emerging workloads such as AI/ML. Microsoft Azure is one of the largest public cloud platforms worldwide, providing a great channel for product impact that touches the lives of millions of users daily. Microsoft’s partnership with world leaders in AI technology provides unparalleled opportunities for innovation at the cutting edge of high-performance computing and networking.  

Our team has delivered and we are now looking for talented hardware verification engineers to join our team, developing Azure’s next generation networking devices.  

Microsoft’s innovative approach for hardware/software co-design leverages custom-designed hardware to offload and accelerate many types of computations and functions of the Azure network. Our vertical work environment offers an unparalleled opportunity to define end-to-end features, implement & test them, and then deploy your work and see how it is used at cloud scale! 

Come join us and be challenged daily as you build advanced hardware/software acceleration solutions for some of the world’s largest datacenter networks and AI supercomputers. This is a great opportunity to join a team that has built some of the largest scale cloud systems ever deployed and learn from the very best.

• 6+ years of proven experience in verification of large ASIC/FPGA designs  
• Extensive knowledge of hardware verification concepts and tools (UVM, unit level and full chip verification, coverage-based verification) 
• A versatile can-do, problem-solving attitude, and desire to handle a wide array of challenges.  
• Excellent communication skills in English.  
• BSc/MSc in Electrical Engineering, Computer Science, or Computer Engineering, from a major university.  

• Design test environments for units and full devices, based on deep understanding of customer requirements, DUT functionality, and system architecture. 
• Design and implement VIP, test benches, and verification infrastructure in SystemVerilog UVM. 
• Develop and execute test/coverage plans to verify hardware designs and reach cloud-grade quality. 
• Interact with hardware- and system-validation platforms, as part of the verification/validation flow.  
• Oversee and train junior engineers and take leadership roles on large projects. 
• Occasional on-call responsibilities for resolving customer issues in production.