SoC Design Engineer, Machine Learning Accelerators

About the job

As a SoC Design Engineer, you will join a team working on SoC-level Register-Transfer Level (RTL) design for our data-center accelerators. You will work on top-level RTL, architecture, design and implementation of global communication business, and integration of Application-specific integrated circuit (ASIC) designs. This is a cross-functional and central role that will require interactions with numerous ASIC development teams. You will own deliverables to the cross-functional teams (i.e. Physical Design, Verification, Validation, Firmware etc.) at various project milestones. You will also be directly involved in defining and creating methodologies that enable an efficient design environment for all ASIC engineers.

In this role, you will be part of a group of engineers to uplift an existing on-chip connectivity solution into one that will be programmatically assembled, instantiated and optimized. Your will inform the architecture and micro-architectural modifications of the solution to enable discrete blocks of functionality to be assembled and instantiated by software to provide customized and flexible implementations. You will also provide users the ability to customize the performance, power and area of the solution based on the needs of the system. You will also work within the team to manage SoC IP integration and participate in SoC level sign-off activities. You will have experience in architecting RTL solutions employing software based construction, instantiation, customization and generation of RTL.

The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.

We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.

The US base salary range for this full-time position is $132,000-$189,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .