Physical Design Engineer

2 Months ago • All levels • Research & Development

About the job

Job Description

Marvell seeks a Physical Design Engineer to implement and verify complex SOCs for high-performance processor chips. The role involves managing physical design activities, ensuring product quality, and improving EDA tool flows. Experience in floorplanning, place and route, static timing analysis, and layout CAD tools is valuable.
Must have:
  • Physical Design
  • SOC Implementation
  • EDA Tools
  • CMOS Technology
Good to have:
  • RTL/Gate Synthesis
  • Power/IR/EM Analysis
  • Static Timing Analysis
  • Layout CAD Tools
Perks:
  • Competitive Compensation
  • Great Benefits
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About Marvell

Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities. 

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. 

Your Team, Your Impact

As a Physical Design Engineer, you will be a member of the Implementation team designing the next generation of high-performance processor chips in leading-edge.

What You Can Expect

The Physical Design Engineer will be responsible for the implementation and verification of complex SOC's (System On Chip) in CMOS technology and to run the verification required to guarantee the quality of the products during their manufacture and when chip is back into the lab, managing related day to day physical design activities in meeting project schedules. 
The position will also be responsible for implementing, developing or improve EDA tool flows and/or methodologies. 

PD Engineers will run evaluation of tools or new CMOS technologies.

What We're Looking For

  • Bachelor’s degree in electronic engineering, Computer Engineering or related fields
  • Able to relocate to Cordoba city
  • Minimum English Level (B1)
  • Basic knowledge on any programing language like (C,C++,Phyton, Java, C#, TCL, etc)
  • Basic knowledge on Unix/Linux operative system (non-exclusive)
  • Previous experience in the following areas is not mandatory but will be positively valued:
    • RTL/gate synthesis
    • Floorplanning, place and route
    • Static timing/crosstalk analysis
    • Physical verification
    • Power/IR/EM analysis
    • Experience with following layout CAD tools:
      • Synthesis: Design Compiler or Genus
      • Place & Route: ICC2 or FusionCompiler or Innovus
      • Static timing: Primetime or Tempus

Additional Compensation and Benefit Elements

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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About The Company

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Pavia, Lombardy, Italy (On-Site)

Pavia, Lombardy, Italy (On-Site)

Pavia, Lombardy, Italy (On-Site)

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