Lead CPU Performance Architect, Silicon

2 Weeks ago • 8 Years + • Research & Development • $183,000 PA - $271,000 PA

Job Summary

Job Description

This role involves leading the performance architecture of Google's custom silicon solutions for direct-to-consumer products. Responsibilities include improving processor instruction set architecture, developing innovative micro-architecture features, and delivering advanced SoC products. The position requires collaboration with Android applications and AI teams to analyze application and benchmark performance across design phases. The Lead CPU Performance Architect will deliver solutions for CPU performance, micro-architecture design, and tool infrastructure, driving performance correlation between models and RTL implementation. They will also plan, evaluate, and define CPU subsystem architecture specifications, leading collaboration with RTL, design verification, and physical design teams.
Must have:
  • Master's degree in relevant field
  • 8+ years experience in high-performance microprocessor architecture
  • Experience in CPU architecture with CPU blocks
  • Performance modeling, analysis, and workload characterization
  • Lead collaboration with design teams
Good to have:
  • PhD in relevant field
  • Experience leading CPU/ML micro-architecture exploration
  • Knowledge of system software components (Linux, drivers, runtime)
  • Knowledge of processor instruction set architecture (ARM, RISC-V, x86)
  • Excellent communication skills
Perks:
  • Bonus
  • Equity
  • Benefits

Job Details


Minimum qualifications:

  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
  • 8 years of experience in high-performance microprocessor architecture, micro-architecture, performance, and design.
  • Experience in CPU architecture with CPU blocks.
  • Experience in performance modeling, analysis, correlation, and workload characterization.

Preferred qualifications:

  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
  • Experience leading CPU/ML micro-architecture exploration, performance model development, performance analysis, performance correlation, and workload characterization.
  • Knowledge of system software components, such as Linux, drivers, and runtime.
  • Knowledge of processor instruction set architecture (e.g., ARM, RISC-V, x86).
  • Excellent communication skills.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration.

As a Lead CPU Performance Architect in architecture and performance, you will be the key contributor to improve processor instruction set architecture, to develop innovative micro-architecture features, and deliver Google’s advanced SoC products. You will have the opportunity to collaborate with talents in Google’s Android applications and Google’s Artificial Intelligence (AI) teams to plan and conduct application and benchmark performance analysis, and to project their performance at various design phases.

The US base salary range for this full-time position is $183,000-$271,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.

Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .

Responsibilities

  • Deliver solutions to problems, including Central Processing Unit (CPU) performance, micro-architecture design, tool infrastructure, and methodology.
  • Plan, drive, and evaluate Advanced RISC Machine's(ARM's) architecture features from both architecture and performance angles.
  • Define and write CPU subsystem architecture specifications.
  • Lead the collaboration with RTL, design verification, and physical design teams to develop CPU implementation.
  • Drive performance correlation between the performance model and RTL implementation, and perform pre-silicon and post-silicon performance bug triage.

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