Machine Learning Hardware Architect
Job Summary
Job Description
This role involves shaping the future of AI/ML hardware acceleration by developing cutting-edge TPU (Tensor Processing Unit) technology. You'll work with hardware and software architects to model, analyze, and define next-generation TPUs. Responsibilities include ML workload characterization and benchmarking, performance and power analysis, developing architectural models, collaborating on hardware/software co-design, and proposing optimizations for next-generation TPUs. You'll contribute to the innovation behind Google products and leverage your design and verification expertise to verify complex digital designs, focusing on TPU architecture and its integration within AI/ML systems.
Must have:
- Bachelor's degree in relevant field or equivalent experience
- 3+ years experience in computer architecture performance analysis and optimization
- Experience developing software systems in C++
- Work on ML workload characterization and benchmarking
- Conduct performance and power analysis
Good to have:
- 7+ years experience in computer architecture performance analysis and optimization
- Experience in applying computer architecture principles to solve open-ended problems
- Experience in analyzing workload performance and creating benchmarks
- Experience in hardware and software co-design
- Knowledge of processor or accelerator designs and mapping ML models to hardware architectures
- Knowledge of RTL design using Verilog
Perks:
- Bonus
- Equity
- Benefits
2 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
- 3 years of experience in computer architecture performance analysis and optimization, or a PhD degree.
- Experience in developing software systems in C++.
Preferred qualifications:
- 7 years of experience in computer architecture performance analysis and optimization.
- Experience in applying computer architecture principles to solve open-ended problems.
- Experience in analyzing workload performance and creating benchmarks.
- Experience in hardware and software co-design.
- Knowledge of processor design or accelerator designs and mapping ML models to hardware architectures.
- Knowledge of design of digital reasoning at the Register Transfer Level (RTL) using Verilog.
About the job
In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive cutting-edge TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a diverse team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.
In this role, you will work with hardware and software architects to model, analyze, and define next-generation Tensor Processing Unit (TPUs).
The ML, Systems, & Cloud AI (MSCA) organization at Google designs, implements, and manages the hardware, software, machine learning, and systems infrastructure for all Google services (Search, YouTube, etc.) and Google Cloud. Our end users are Googlers, Cloud customers and the billions of people who use Google services around the world.We prioritize security, efficiency, and reliability across everything we do - from developing our latest TPUs to running a global network, while driving towards shaping the future of hyperscale computing. Our global impact spans software and hardware, including Google Cloud’s Vertex AI, the leading AI platform for bringing Gemini models to enterprise customers.
The US base salary range for this full-time position is $156,000-$229,000 + bonus + equity + benefits. Our salary ranges are determined by role, level, and location. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific salary range for your preferred location during the hiring process.
Please note that the compensation details listed in US role postings reflect the base salary only, and do not include bonus, equity, or benefits. Learn more about .
Responsibilities
- Work on Machine Learning (ML) workload characterization and benchmarking.
- Conduct performance and power analysis and evaluate proposals.
- Develop architectural and microarchitectural models to enable quantitative analysis.
- Collaborate with partners in hardware design, software, compiler, Machine Learning (ML) model and research teams for hardware/software co-design.
- Propose capabilities and optimizations for next-generation TPUs and chip roadmap.
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