Design Verification Engineer
Job Summary
Job Description
- Bachelor's degree in relevant field
- 3+ years experience in ASIC design/verification
- CPU subsystem & ARM architecture verification experience
- Proficiency in scripting (Python, Perl)
- Understanding of modern CPU architectures
- In-depth knowledge of CPU design tools and methodologies specific to ARM
- Experience with VMM, OVM, UVM
5 skills required
Job Details
Minimum qualifications:
- Bachelor's degree in Computer Engineering, Electrical Engineering, Computer Science, related field, or equivalent practical experience.
- 3 years of experience in ASIC design, verification, or related work experience.
- Experience in verifying CPU subsystem and ARM Architecture.
- Experience in the verification of designs such as CPUs, networking, or peripheral controllers.
Preferred qualifications:
- In-depth knowledge of CPU design tools and methodologies specific to ARM.
- Excellent communication and people skills, with the ability to collaborate effectively across teams.
- Proficiency in scripting languages (Python, Perl) for automation and analysis.
About the job
Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.
Responsibilities
- Design and implement reusable DV infrastructure components including testbenches, stimulus generators, and checkers tailored for CPU verification within the ARM ecosystem.
- Create and enhance CPU testbench DV flow, focusing on compilation/linking, memory loads, debug hooks, and adherence to ARM specifications.
- Define and track key coverage metrics to ensure thorough verification and identify potential design flaws in CPU Sub-System.
- Understand modern CPU architectures, with particular emphasis on ARM CPU architectures and associated microarchitectural features.
- Create and utilize verification components and environments using industry-standard methodologies (VMM, OVM, UVM).
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