This role involves developing ASICs to accelerate machine learning in data centers. You'll collaborate with architecture, verification, power, and physical design teams to deliver quality designs for next-generation data center accelerators. Responsibilities include owning microarchitecture and implementation of IPs and subsystems, working with other teams to drive feature closure, and improving power, performance, and area. You'll also contribute to design methodology, libraries, and debugging. The position requires expertise in ASIC development, verification, synthesis, and design for testing (DFT).