Principal Product Validation Engineer

2 Months ago • 7 Years + • Research & Development

About the job

Job Description

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At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Principal Product Validation Engineer

Join a growing and dynamic team and help lead the development of best in class digital and mixed signal IP products.  This is a tremendous opportunity to work with an experienced team focusing on development of high-performance physical IP related to protocols such as PCIe, UCIe, USB, SATA, Ethernet, Display Port, and HDMI.

The candidate will be a key member of the technical staff responsible for IP validation including test plan creation, test development and test execution.  The candidate will also participate in engaging with post silicon customer bringup of IP’s and supporting them through all post silicon phases.

The ideal candidate should have strong SERDES background, especially hands on chip testing experience in lab. Customer support experience is a plus

The candidate should demonstrate an ability to work independently on debug of complex tests and interacting with the design engineering team(s) to arrive at suitable resolution. The candidate should be able to own the tasks provided to him/her and be able to track and report progress on a regular basis.

Excellent communication skills and an ability to work as part of a highly collaborative team are essential. 

Minimum Experience:

  • Bachelors in computer science or electrical Engineering + 7 years of related experience, or Masters +5 years of related experience, or PhD + 2 years of related experience
  • Experience with characterizing
    • PCIe Gen1/2/3/4/5 Base Spec and/or CEM Spec
    • USB 3.0 and/or USB 3.1
    • 10Gkr and 25Gkr Ethernet rates
    • UCIe or D2D Testing Background is a big plus
  • Thorough knowledge of Scopes and Berts. Experience with Keysight/Anritsu BERT’s is a MUST
  • Capable of independently running tests such as Tx Output jitter measurements, Receiver JTOL and common validation tests
  • Cadence PCB design and layout tools experience 
  • Familiar with common scripting languages such as Python, Perl and Labview
  • Knowledge of circuits such as Amplifiers, Phase Locked Loops and Equalizers
  • Familiar with concepts of Jitter, Noise and other non-idealities in circuits
  • Microsoft Word, Excel, Visio experience
  • Excellent verbal and communication skills

We’re doing work that matters. Help us solve what others can’t.

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About The Company

Yokohama, Kanagawa, Japan (On-Site)

Feldkirchen, Bavaria, Germany (Hybrid)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

Burlington, Massachusetts, United States (On-Site)

Katowice, Silesian Voivodeship, Poland (On-Site)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

San Jose, California, United States (On-Site)

Bengaluru, Karnataka, India (On-Site)

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