The Staff IC Layout Designer will collaborate with IC Design Engineers across three design sites: the United States, the United Kingdom, and Switzerland. They will translate circuit schematics into physical layout. This role involves working with Technology Engineers to implement circuit components like transistors, resistors, and capacitors, as well as test structures. The individual will also verify completed physical layout using CAD tools such as Cadence Layout and Schematic editor, and Mentor Calibre DRC and LVS, and perform all necessary tasks for preparing and taping out the verified layout database to the mask shop.